[GUEST ACCESS MODE: Data is scrambled or limited to provide examples. Make requests using your API key to unlock full data. Check https://lunarcrush.ai/auth for authentication information.]  Jukan [@Jukanlosreve](/creator/twitter/Jukanlosreve) on x 22.6K followers Created: 2025-07-22 03:04:51 UTC In Summary: - CXMT's DDR5 and LPDDR5 have achieved a quality level nearly on par with Nanya's. - They have not yet entered mass production. - While mass production was initially expected to begin in May-June, large-scale shipments have not occurred even in July. - Currently, CXMT's production process has reached the sub-18nm level, and as a result, U.S. equipment companies have withdrawn their maintenance services. - In sample tests in early 2025, an issue emerged where the chips failed to meet the wide temperature range standard. - Test results showed thermal issues causing quality instability above approximately XX degrees Celsius, and the chips did not meet high-end product performance standards in sub-zero temperature environments. - However, it is reported that by recently improving the photomask design, these issues related to the wide temperature range test have been significantly improved. - Currently, the yield for the entire production line is slightly above 50%. XXXXX engagements  **Related Topics** [dram](/topic/dram) [par](/topic/par) [Post Link](https://x.com/Jukanlosreve/status/1947493013649035537)
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Jukan @Jukanlosreve on x 22.6K followers
Created: 2025-07-22 03:04:51 UTC
In Summary:
CXMT's DDR5 and LPDDR5 have achieved a quality level nearly on par with Nanya's.
They have not yet entered mass production.
While mass production was initially expected to begin in May-June, large-scale shipments have not occurred even in July.
Currently, CXMT's production process has reached the sub-18nm level, and as a result, U.S. equipment companies have withdrawn their maintenance services.
In sample tests in early 2025, an issue emerged where the chips failed to meet the wide temperature range standard.
Test results showed thermal issues causing quality instability above approximately XX degrees Celsius, and the chips did not meet high-end product performance standards in sub-zero temperature environments.
However, it is reported that by recently improving the photomask design, these issues related to the wide temperature range test have been significantly improved.
Currently, the yield for the entire production line is slightly above 50%.
XXXXX engagements
