@jaykihn0 Jaykihn

Jaykihn posts on X about lake, events, core, twitter the most. They currently have [-----] followers and [--] posts still getting attention that total [-----] engagements in the last [--] hours.

Engagements: [-----] #

Mentions: [--] #

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Social Influence

Social category influence social networks technology brands

Social topic influence lake, events, core, twitter, platform, performance, rapids, nda, intel, pricing

Top assets mentioned Rapids (RPD) intel (INTEL)

Top Social Posts

Top posts by engagements in the last [--] hours

"hello twitter. LNL power draw"
X Link 2024-06-25T21:43Z [----] followers, 10.2K engagements

"LNL benchmarks. preliminary subject to change yada yada"
X Link 2024-06-25T21:44Z [---] followers, [----] engagements

"@ghost_motley With the RL-ILM the heatsink needs to apply a minimum of 35lb of loading force onto the cpu to maintain proper operation. This is not a requirement with the default ILM which works fine under all heatsink scenarios. Its a compatibility risk"
X Link 2024-07-03T22:31Z [---] followers, [---] engagements

"Collection of various small improvements/changes shipping with Arrow Lake -S. All specifications are up to except for TOPS which may exceed the listed number on the retail product"
X Link 2024-07-09T02:39Z [---] followers, 17.4K engagements

"Bartlett BTL-S SKUs. Hybrid targeting early Jan25 P-core only targeting Q325"
X Link 2024-07-15T14:09Z [---] followers, 11.3K engagements

"The oxidation claim makes no sense both logistically and technically. Events in manufacturing and packaging do not correspond with the timeframes claimed. It would be impossible for such an issue to ship. The explanation used for the cause of oxidation makes no sense either. Talking about tips we are currently researching relating to Intel's CPU instability problems including oxidation claims excessive voltage and more: https://t.co/nK6AF7vjWS Talking about tips we are currently researching relating to Intel's CPU instability problems including oxidation claims excessive voltage and more:"
X Link 2024-07-20T10:39Z [---] followers, [----] engagements

"@Bcannon2001 @G_melo_ding Thanks for letting me know. Ill look into it further and follow up at some point in the future"
X Link 2024-07-20T16:31Z [---] followers, [---] engagements

"@Tech_Meld_ @9550pro Yes"
X Link 2024-07-22T10:19Z [---] followers, [---] engagements

"Granite Rapids -AP SKUs"
X Link 2024-07-31T23:42Z [---] followers, [----] engagements

"@StingerTrades @hms1193 HX only has performance and baseline profiles even on the 8+16 configuration"
X Link 2024-08-08T00:20Z [---] followers, [---] engagements

"@VideoCardz Hit by twitter word limit. Cant believe I cant post an essay smh"
X Link 2024-08-08T07:14Z [---] followers, [----] engagements

"@Javi_Jazek @VideoCardz My current safe limit for boosting spikes is 1.424V. Im testing 1.431V. Ive got three rpl I9 samples each at very different OC-ability (6.3P 4.9E all core; 6.2P 3-core 6P 4.6E all core; 6P 2-core 5.8P 4.3E all core) for testing. This is anecdotal though and personalized"
X Link 2024-08-08T11:17Z [----] followers, [---] engagements

"@9550pro Internal testing showed up to a 1% performance drop (as in 0-1% never higher than 0x125 performance) but that was with base clocks not heavy boosting. This was consistent over different benchmarks with multiple runs. The analysis team chalked it up to run-to-run variance"
X Link 2024-08-08T22:28Z [----] followers, [----] engagements

"Still no EDS so Ill throw my preliminary compilations out there. ARL-S ARL-HX ARL-UH PTL-UH"
X Link 2024-08-09T01:14Z [----] followers, 23.2K engagements

"Updating with some new SKUs. Reminder that I meant to say H870 in the original post not H810. These new SKUs also take the range of these chipsets beyond the range of Arrow Lake -S"
X Link 2024-08-16T03:01Z [----] followers, [--] engagements

"@AFD01979436 Yes although theres plenty of upcoming Xeon chips so thats a wide blanket. I dont think the W890 specification is well-developed yet so I wont get into it now. But for instance I doubt that 26+34 is gonna be the final specification"
X Link 2024-08-16T06:26Z [----] followers, [---] engagements

"Do you enable your Intel GNA in your BIOS And if you actively use it could you comment with your use case Yes I enable it No I leave it disabled Yes I enable it No I leave it disabled"
X Link 2024-08-21T04:08Z [----] followers, [----] engagements

"Updating. Speedometer is being weird and inconsistent at 30W"
X Link 2024-08-25T08:26Z [----] followers, [----] engagements

"Minor update. Other than the highlights in red also fixed the 3-8P clocking on the [---] 65W"
X Link 2024-09-17T00:28Z [----] followers, [----] engagements

"@harukaze5719 No NDA on battery life claims only approval required"
X Link 2024-09-18T10:07Z [----] followers, [----] engagements

"This for 8+16. 6+8 is alike the second image but 25mm horizontal 22.1mm vertical. @VideoCardz HX/S https://t.co/LkIB4PnM7D @VideoCardz HX/S https://t.co/LkIB4PnM7D"
X Link 2024-10-03T06:59Z [----] followers, [----] engagements

"@gdch12021652 @GamerJava WCL -U Its a -U product to succeed prior -U products"
X Link 2024-10-19T12:44Z [----] followers, [---] engagements

"@Prakhar6200 @max77sabers @kopite7kimi @Kepler_L2 🤷♂ for now"
X Link 2024-10-26T04:56Z [----] followers, [---] engagements

"@__mintsuki @S_Alnassiri @max77sabers @kopite7kimi @Kepler_L2 ARL-S Refresh canned. Rest is preliminary so no comment"
X Link 2024-10-30T09:32Z [----] followers, [---] engagements

"@D_K_Rajasekar @__mintsuki @S_Alnassiri @max77sabers @kopite7kimi @Kepler_L2 [---] and [---] SKUs spotted by another individual are MTL-S. Unclear if theyd launch Im surprised theyd been spotted as consumer SKUs at all. MTL-Ss been used in validation/enablement but other than the possibility of [---] and [---] theres no indication theyd release retail"
X Link 2024-10-30T11:26Z [----] followers, [---] engagements

"@gdch12021652 @3DCenter_org Once adamantine matures enough and the cost-balancing is sufficient I dont see why not. But Im not the one making the decisions"
X Link 2024-11-16T03:16Z [----] followers, [---] engagements

"Arrow Lake -U SKUs and clocking. MTL-U (Core Ultra 1) 15W provided for comparison"
X Link 2024-11-18T00:00Z [----] followers, 10.8K engagements

"@FLimaxxx @momomo_us Last dGPU Desktop Celestial and Druid are as planned as ever. Im afraid youve gotten Intels commitment to laptop dGPUs and desktop dGPUs mixed up"
X Link 2024-11-27T14:54Z [----] followers, [----] engagements

"Twin Lake (TWL) SKUs clocking and TDP. Alder Lake -N (ADL-N) provided for comparison. Intel N150 [--] core https://t.co/xLJRerJvrP Intel N250 [--] core https://t.co/EpuphqhsVJ Core [--] N350 [--] core https://t.co/l3pUnVfJJX Core [--] N355 [--] core https://t.co/rBBUILe12C Intel N150 [--] core https://t.co/xLJRerJvrP Intel N250 [--] core https://t.co/EpuphqhsVJ Core [--] N350 [--] core https://t.co/l3pUnVfJJX Core [--] N355 [--] core https://t.co/rBBUILe12C"
X Link 2024-12-29T00:32Z [----] followers, [----] engagements

"The 230F is new to me. Perhaps its the PRC regional successor of the 14490f In the meantime that B0 SKU chart was compiled prior to the cancellation of 20A. Heres a chart of the new B0 SKUs since then. 230F is not in the regular B0 (TSMC N3B) SKU. IMG Source: @jaykihn0 https://t.co/CUAJEgI9nd 230F is not in the regular B0 (TSMC N3B) SKU. IMG Source: @jaykihn0 https://t.co/CUAJEgI9nd"
X Link 2024-12-30T20:32Z [----] followers, [----] engagements

"GNR-W Mainstream 4ch 80L G5 cpu Expert 8ch 128L G5 cpu W890 24L G4 PCIe 8L G4 DMI"
X Link 2025-02-12T12:00Z [----] followers, [----] engagements

"@x86deadandback 99C = ES1 99D = ES2"
X Link 2025-05-12T19:53Z [----] followers, [---] engagements

"@ajgrimmett The highest config for launch is 4+8+4+12"
X Link 2025-05-14T22:31Z [----] followers, [--] engagements

"@GawroskiT @miktdt I hadnt stated anything on the ARL lineup beyond the 285K prior so they must have information that isnt sourced from me and sourced myself either tangentially or as the only public source"
X Link 2024-08-18T15:19Z [----] followers, [----] engagements

"@hardwarecanucks Ive only looked at a couple regions but 7800x3d supply is the limitation for sales for months. Prices grow from the retail of 399usd to new aftermarket pricing around 460usd (both converted) between retail stocking events every 1-3 days. Another zen4 X3D makes total sense"
X Link 2024-08-21T02:00Z [----] followers, [---] engagements

"@Sebasti66855537 @beyond_fps Speaking of was anyone else able to confirm this behavior on Intel SKUs"
X Link 2024-08-27T14:40Z [----] followers, [----] engagements

"@_wildc @Sebasti66855537 @SquashBionic What"
X Link 2024-10-12T10:42Z [----] followers, [---] engagements

"@94G8LA Yes. The [---] and 205T are on A stepping so they are not MTL-S. The [---] SKU is gone"
X Link 2024-12-31T02:39Z [----] followers, [---] engagements

"PTL-H 4+8+4+12 x8 G4 x4 G5 4x TBT4 LPDDR5x [---] TOPS (10+50+120) PTL-H 4+8+4+4 x8 G4 x12 G5 4x TBT4 LPDDR5x & DDR5 [---] TOPS (10+50+40) PTL-H 4+0+4+4 x8 G4 x4 G5 4x TBT4 LPDDR5x & DDR5 [---] TOPS (10+50+40) WCL 2+0+4+2 x6 G4 2x TBT4 LPDDR5x & DDR5 [--] TOPS (4+18+18)"
X Link 2025-02-07T13:30Z [----] followers, 29.6K engagements

"@BenchLeaks Not unknown. https://www.intel.com/content/www/us/en/products/sku/241870/intel-core-ultra-5-processor-225t-20m-cache-up-to-4-90-ghz/specifications.html https://www.intel.com/content/www/us/en/products/sku/241870/intel-core-ultra-5-processor-225t-20m-cache-up-to-4-90-ghz/specifications.html"
X Link 2025-02-07T14:56Z [----] followers, [---] engagements

"Nova Lake -S Xe3 + Xe4 + not /"
X Link 2025-06-04T02:00Z [----] followers, 11.6K engagements

"@VideoCardz No all 4+4+4 and 4+8+4 have both 65W & 80W configurations. OEMs choose. (preliminary) Because PTL is hard to cool for ST boost. Experience Based PL1 will also debut on PTL. More info in the future"
X Link 2025-11-05T16:18Z [----] followers, [----] engagements

"@326powah @c0ll0bu No unlocked. Only 125W SKU. [---] ST [---] all core MT [---] base"
X Link 2025-11-05T16:33Z [----] followers, [----] engagements

"@_wildc Youre thinking about an environment where CPU power is more valuable when routed to the GPU anyway. Gaming doesnt need the fastest CPU SKU in a lineup when a dGPU is present"
X Link 2025-11-07T16:41Z [----] followers, [---] engagements

"NVL-S ships with NPU6 at [--] TOPS a three-generation uplift from the [--] TOPS of ARL-S. The iGPU is comprised of [--] Xe3-LPG cores a regression in core count from the [--] in ARL-S"
X Link 2025-11-24T17:00Z [----] followers, 11.2K engagements

"bLLC will only be present on unlocked SKUs"
X Link 2025-11-25T16:00Z [----] followers, 21K engagements

"@G_melo_ding No"
X Link 2025-12-01T02:12Z [----] followers, [---] engagements

"@x86deadandback [----] 77.4"
X Link 2026-01-07T04:07Z [----] followers, [---] engagements

"@XYang2023 @x86deadandback Yes"
X Link 2026-01-16T13:21Z [----] followers, [---] engagements

"@XYang2023 Yes"
X Link 2026-01-21T13:24Z [----] followers, [---] engagements

"Damn Im late. Wanted to wait one more day for QS week. ARL-S lineup. According to Benchlife ARL-S will be released on October 10th. https://t.co/Nyo7gw5pmJ https://t.co/JpxH5ZohG4 ARL-S lineup. According to Benchlife ARL-S will be released on October 10th. https://t.co/Nyo7gw5pmJ https://t.co/JpxH5ZohG4"
X Link 2024-08-18T14:36Z [----] followers, 17.9K engagements

"Wildcat Lake Refresh will contain both 2+0+4 and 4+0+4 WCL configurations. Wildcat Lake only contains 2+0+4"
X Link 2025-12-01T01:00Z [----] followers, 13.5K engagements

"@MCH2024 @Silicon_Fly 388H is not a regression in performance from the 285H in ST/MT"
X Link 2025-12-09T20:00Z [----] followers, [---] engagements

"@ot_twat Yes cannot be offset in either direction"
X Link 2026-02-10T01:47Z [----] followers, [---] engagements

"@tmaj314159 @3DCenter_org @kopite7kimi I can corroborate his claims on the 16+32+4 power draw and the NVL-K=bllc"
X Link 2026-02-10T14:13Z [----] followers, [---] engagements

"@tmaj314159 @3DCenter_org @kopite7kimi But Raptor Lake flagship was configured at a 253W PL2. The PL2 configuration for Nova Lake flagship is after the events of the Intel directives to rein in motherboard vendors two generations ago. This PL2 claim is an accurate reflection of the chip itself not framed badly"
X Link 2026-02-10T14:27Z [----] followers, [---] engagements

"LGA1851s motherboard-to-IHS height (6.831-7.497mm) differs only slightly from LGA1700 (6.76-7.4mm) and is validated for the same height range (6.53-7.53mm). This is the only key mechanical difference between the two. LGA1700 coolers are forward-compatible (but not ILMs)"
X Link 2024-07-03T02:10Z [----] followers, [----] engagements

"@depressoiscool TJMax is a decided-upon value with every lineup based on thermal headroom recommended thermal solution temp-per-watt power delivery use case uptime reliability and lifetime targets. The variance is not major. For instance NVL was considered between 90C and 100C. (1/3)"
X Link 2026-02-09T11:40Z [----] followers, [---] engagements

"@harukaze5719 @momomo_us There are many ARL-S A0 SKUs. [---] 205T [---] 225F 225T 230F [---] 235T [---] 245T Most of these SKUs have both A0 and B0 variants"
X Link 2025-01-09T23:12Z [----] followers, [---] engagements

"Intel [---] Series Chipset Specifications"
X Link 2026-02-09T10:00Z [----] followers, 27.8K engagements

"NVL-S preliminary (TJMax value). TJMax cannot be offset and thermal throttling cannot be disabled. The thermal sensor can report from -64C to 100C (TJMax) if Negative Temperature Reporting is enabled"
X Link 2026-02-09T11:00Z [----] followers, 10.2K engagements

"Preliminary. Only some boards will support the full-power 52C platform. Other boards will limit the performance and power of the 52C platform"
X Link 2026-02-13T14:00Z [----] followers, 10.7K engagements

"RT @9550pro: NVL 8+16 Die [----] mm x [---] mm https://weibo.com/3219724922/QrCwKvPOT https://weibo.com/3219724922/QrCwKvPOT"
X Link 2026-02-15T14:28Z [----] followers, [--] engagements

"NVL 8+16 Die [----] mm x [---] mm https://weibo.com/3219724922/QrCwKvPOT NVL 8+16 Die TSMC N2 110+mm2 NVL 8+16 bLLC Die TSMC N2 150+mm2 https://weibo.com/3219724922/QrCwKvPOT NVL 8+16 Die TSMC N2 110+mm2 NVL 8+16 bLLC Die TSMC N2 150+mm2"
X Link 2026-02-15T11:41Z 12.4K followers, [----] engagements

"NVL 8+16 Die TSMC N2 110+mm2 NVL 8+16 bLLC Die TSMC N2 150+mm2 Zen2 CCD: 24 Core 216 MB L3 TSMC N7 [--] mm2 Zen3 CCD: [--] Core 32MB L3 TSMC N7 [--] mm2 Zen4 CCD : [--] Core 32MB L3 TSMC N5 [--] mm2 Zen5 CCD : [--] Core 32MB L3 TSMC N4 [--] mm2 Zen6 CCD : [--] Core 48MB L3 TSMC N2 [--] mm2 Zen2 CCD: 24 Core 216 MB L3 TSMC N7 [--] mm2 Zen3 CCD: [--] Core 32MB L3 TSMC N7 [--] mm2 Zen4 CCD : [--] Core 32MB L3 TSMC N5 [--] mm2 Zen5 CCD : [--] Core 32MB L3 TSMC N4 [--] mm2 Zen6 CCD : [--] Core 48MB L3 TSMC N2 [--] mm2"
X Link 2026-02-11T11:12Z 12.4K followers, 28.1K engagements

"These are the old values for the 14+24 SKU. These are outdated. Do not use these values for reference. Probably not the final specifications. https://t.co/5ctmUPqcgj Probably not the final specifications. https://t.co/5ctmUPqcgj"
X Link 2026-02-13T13:00Z [----] followers, [----] engagements

"Probably not the final specifications"
X Link 2026-02-13T10:44Z 12.4K followers, 17.4K engagements

"@3DCenter_org Thank you this interpretation is completely correct. I'm afraid the 400W PL2 is just a conservative lower limit"
X Link 2026-02-11T01:34Z 33.3K followers, [----] engagements

"Intel [---] Series Chipset Specifications"
X Link 2026-02-09T10:00Z [----] followers, 27.8K engagements

"Mistake in Processor PCIE [---] Slot Lane Config: The first line should be 1x16 not 1x16+1x4"
X Link 2026-02-09T11:45Z [----] followers, [----] engagements

"Z990 Q970 W980 support TB5 80G/120G depending on the retimer"
X Link 2026-02-09T13:19Z [----] followers, [----] engagements

"The processor can boot through only LP-Ecores or both LP-E-cores and E-cores with P-cores disabled. All P-cores can be disabled leaving only E-cores and entire compute dies can be disabled. Cores can only be disabled per-cluster as both P-cores and E-cores are now clustered"
X Link 2026-02-09T11:23Z [----] followers, [----] engagements

"Nova Lake -S LP E-cores cannot be overclocked"
X Link 2026-02-09T10:45Z [----] followers, [----] engagements

"@jaykihn0 B65 too"
X Link 2026-01-21T13:42Z [----] followers, [----] engagements

"B70 Pro soon"
X Link 2026-01-21T13:00Z [----] followers, [----] engagements

"4+0+4+4 LPDDR5x frequency is rated at [----] not [----] as at launch"
X Link 2026-01-12T01:00Z [----] followers, [----] engagements

"To clarify ALL 4+0+4+4 are rated at LPDDR5x-7467 while launch materials only list select 4+0+4+4 SKUs"
X Link 2026-01-12T04:00Z [----] followers, [----] engagements

"Nova Lake -S Xe3 + Xe4 + not /"
X Link 2025-06-04T02:00Z [----] followers, 11.6K engagements

"Xe3 graphics + Xe4 display & media"
X Link 2025-06-04T07:00Z [----] followers, [----] engagements

"Xe3p not Xe4"
X Link 2026-01-12T01:17Z [----] followers, [----] engagements

"The 4+0+4 uses [--] power phases while the 2+0+4 uses one power phase. Wildcat Lake Refresh will contain both 2+0+4 and 4+0+4 WCL configurations. Wildcat Lake only contains 2+0+4. Wildcat Lake Refresh will contain both 2+0+4 and 4+0+4 WCL configurations. Wildcat Lake only contains 2+0+4"
X Link 2026-01-05T14:00Z [----] followers, [----] engagements

"Wildcat Lake Refresh will contain both 2+0+4 and 4+0+4 WCL configurations. Wildcat Lake only contains 2+0+4"
X Link 2025-12-01T01:00Z [----] followers, 13.5K engagements

"bLLC will only be present on unlocked SKUs"
X Link 2025-11-25T16:00Z [----] followers, 21K engagements

"4+8+4 388H [---] 386H [---] 368H [---] 366H [---] 358H [---] 356H [---] 4+4+4 338H [---] 336H [---] 4+0+4 [---] [---] [---] [---] [---] [---] [---] [---] 2+0+4 [---] [---] [---] 4.4"
X Link 2025-11-05T15:00Z [----] followers, 15.3K engagements

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